The semiconductor industry's tolerance for process variability continues to decrease as the size of semiconductor devices shrink. To meet these tighter process requirements, the industry has developed a host of new processes which meet the tighter process window requirements, but these processes often take a longer time to complete. For example, for forming a copper diffusion barrier layer conformally onto the surface of a high aspect ratio, 65 nm or smaller interconnect feature, it may be necessary to use an ALD process. ALD is a variant of CVD that demonstrates superior step coverage compared to CVD. ALD is based upon atomic layer epitaxy (ALE) that was originally employed to fabricate electroluminescent displays. ALD employs chemisorption to deposit a saturated monolayer of reactive precursor molecules on a substrate surface. This is achieved by cyclically alternating the pulsing of appropriate reactive precursors into a deposition chamber. Each injection of a reactive precursor is typically separated by an inert gas purge to provide a new atomic layer to previous deposited layers to form a uniform material layer on the surface of a substrate. Cycles of reactive precursor and inert purge gases are repeated to form the material layer to a desired thickness. The biggest drawback with ALD techniques is that the deposition rate is much lower than typical CVD techniques by at least an order of magnitude. For example, some ALD processes can require a chamber processing time from about 10 to about 200 minutes to deposit a high quality layer on the surface of the substrate.
Silicon dioxide is a very important material in the microelectronics industry. With the continuation of device miniaturization and increase in the complexity of the device architecture, it becomes very challenging to deposit highly conformal films over these structures. In particular, 3D NAND manufacturing will need highly conformal silicon dioxide and silicon nitride deposition inside of holes that have very high aspect ratios. The films need to be similar quality to high temperature process (>600 C) with a wet etch rate (WER) of about 1 and low leakage. Many of the future applications in the microelectronics industry require the deposition of high quality silicon dioxide films at low to mid-range temperatures. Accordingly, there is an ongoing need in the art for methods of uniformly depositing a high quality silicon film on a substrate in an efficient and cost effective manner.